1. Field of the Invention
The present invention relates to analog electronic circuits. More specifically, the present invention relates to analog silicon structures for performing the long term learning function in neural networks. The present invention relates to floating gate MOS structures for performing the learning function of analog values, long term storage of those values, and a family of circuits which electrically control the learning rate and learned analog values.
2. The Prior Art
It has recently become apparent that large-scale analog circuits can be achieved using conventional CMOS technology. The key to achieving very high levels of complexity in an analog system is to operate the individual transistors in their subthreshold region, where the drain current is an exponential function of the gate-source voltage. In this regime of operation, amplifiers can be operated with current levels in the range from 10.sup.-12 A to 10.sup.-7 A. At these low currents, the drain current of the individual transistors saturates at drain voltages above 100 to 200 Mv, allowing analog operation with the same power-supply voltages commonly employed for digital circuits 0-5 V in 1990). Because of the low power-supply voltage and low current level, the total power dissipated by an individual amplifier is extremely small, making possible large-scale systems employing 10.sup.4 or more amplifiers.
Despite the numerous advantages of subthreshold operation, very few systems outside of the electronic watch industry have taken advantage of this mode of operation. The major problems that have prevented application of subthreshold amplifiers have been their input offset voltage and the limited input voltage range.